DigiTenSK : 10GHz digital Super Keyer
This project is a test to make an easy to use and low cost front end for SDR @ 10GHz. First test will be done using FT8 for fun (certainly a modified version to not have a complicated oscillator sub system).
The project use the same Mixer as the VNA Refit project. Those mixer allow to use a lower frequency PLL, they embed a switchable LO doubler.
This first version PCB was made at OSH Park, it may or may not be the definitive manufacturer of the project.
First bring-up of the prototype has been done with partial component assembly (missing few parts for one of the RF path). A LeoBodnar GPSDO was used as a clock source for the PLL (in the final setup it'll also clock the Pluto). A basic ATMEGA328PB code was written in order to program the PLL at startup and enable the first lane mixer.
Not having access to te 26GHz SA for this test the PLL output was set to 3GHz and a tracking generator output around 2.001GHz, a Pluto RX set at 5GHz.